LEAD ENGINEER - PRINCIPAL ENGINEER - Avionics OFP Architect within ARINC 653 RTOS at Southwest Research Institute

Who We Are: The Tactical Aerospace Department provides world-class design, development, and test solutions. We provide avionics and payload/mission equipment for airborne/ground systems for new and legacy platforms for the DoD industry, Allies, and U.S. Government. Objectives of this Role: Architect and design multi-partition, multi-DAL systems within a ARINC 653 environment. Lead teams to develop complex microprocessor based avionics/mission/payload LRU's through the full development cycle (Requirements, design, integrate, V&V, qualification, flight test, etc). Coordinate with customers and upper management. Daily and Monthly Responsibilities: Collaboratively work with teams to develop avionics grade LRUs for airborne and ground systems. Teams consist of core disciplines across Systems, Electrical, Software, Firmware, and Mechanical engineering. Mentor, guide, and develop complex embedded systems. Development includes the full life cycle from requirements and architectures through V&V and integration. Support Department management in specific marketing activities, writing proposals, and developing product/technology roadmaps. Interact directly with clients and company staff to establish requirements and architectures to meet client expectations. Requirements: Requires a Bachelors degree in Computer Engineering, Electrical Engineering, or equivalent engineering degree. 8+ years: Experience designing embedded architecture designs within a RTOS multi partition, multi criticality environment. Experience with RTOS (Green Hills or DDC-I DEOS) development environment as well as LDRA. Experience with C/C++. 2-5 years: Experience leading development and test engineering teams to meet program needs. Experience with integrating software onto hardware and debugging within a lab environment utilizing equipment such as logic analyzers, power supplies, etc. Experience with DO-178 processes and artifacts. Experience with BSP and driver development including communication buses (ethernet, PCIe, 1553, etc). Knowledge/experience with SOSA and FACE interfaces preferred. A valid/clear driver's license is required.