ASIC Digital Design Engineer at Teledyne Technologies

Be visionaryTeledyne Technologies Incorporated provides enabling technologies for industrial growth markets that require advanced technology and high reliability. These markets include aerospace and defense factory automation air and water quality environmental monitoring electronics design and development oceanographic research deepwater oil and gas exploration and production medical imaging and pharmaceutical research.We are looking for individuals who thrive on making an impact and want the excitement of being on a team that wins.Job DescriptionJob Summary:ASIC Digital Design Engineer: Oversees definition design verification and documentation for ASIC development. Determines architecture design logic design and system simulation. Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits. Evaluates all aspects of the process flow from high-level design to synthesis place and route and timing and power use. Analyzes equipment to establish operation data conducts experimental tests and evaluates results. May also review vendor capability to support development. Primary Duties & Responsibilities:Flow down and documentation of customer requirementsPerform digital design timing design and detailed digital simulationsDevelop IC specifications & documentationRequirements Capture & DocumentationTranslating system-level specs into digital requirements.Creating detailed timing (setup/hold pixel clocking) and block diagrams.Creating risk assessments and traceability matrices.RTL Front-End DesignBehavioral modeling of digital controllers (e.g. pixel readout sequencing windowing).Finite State Machine and datapath design for ASIC modes.Clock domain crossing and power-aware RTL coding (asynchronous resets and multi-clock domains).Modular and synthesizable SystemVerilog.Synthesis & OptimizationLogic synthesis with constraints (timing area power).Multi-corner multi-mode (MCMM) analysis.DFT/ATPG insertion (scan chains BIST for ASIC testability).Clock/Power optimization for low-power ASICs.Perform Back-End Physical Design as neededFloorplanning and power grid design.Place and Route (APR) with congestion management.Timing closure across PVT corners.DRC LVS extraction and signoff.Perform RTL Verification & Simulation as neededFunctional verification with UVM testbenches coverage driven verification(code/functional/toggle).Assertion based checks for timing critical paths and co-simulation with analog models (e.g. pixel array interfaces Verilog-AMS).Customer interface and design review presentationsCoordination with design team analog design and full custom IC cell layoutIC Device Test Support: Provide assistance(as required) to test engineering to perform test verificationAttention to Detail required while performing design layout verification and simulationsCollaboration and Teamwork required to coordinate with design team analog design and full custom IC cell layout team membersKnowledge of and Continuous Learning in the following Areas:Full Custom IC Layout Design and CAD toolsImaging Systems and Electro-Optical ComponentsDigital design for CMOS technologySimulation tools such as SPICESchematic Capture and simulationDigital Synthesis and RTL code development implementation and verificationAdditional Skills Required:Analytical Problem-Solving skills required in order to identify the root cause of difficult technical problems as well as analyzing alternate approaches and developing practical solutions to solve technical problems while performing complex IC designs.Organization Planning & Execution required to ensure adherence to detailed digital IC design process and documentationStrong Communication Skills and Good Presentation required to support customer presentations. i.e. PDR CDRInnovation: must have the ability to develop new ideas and/or creative designs using innovative methodologies and/or conceptsDecision Making; Must be self-directing and possess the ability to make decisions based on problem analysis and evaluation of alternatives risks and consequencesJob Qualifications:B.S. in EE or Physics requiredMinimum 5 years experience in IC design circuit topology digital schematic capture and simulation desired.Strong Computer Skills: Word Excel Outlook and PowerPointKnowledgeable in ISO 9001 process and proceduresAdvanced skills in IC Design CAD toolsApplicants must be either a U.S. citizen or PERMANENT ResidentSalary Range: $141900.00-$189200.000Pay TransparencyThe anticipated salary range listed for this role is only an estimate. Actual compensation for successful candidates is carefully determined based on several factors including but not limited to location education/training work experience key skills and type of position.Teledyne and all of our employees are committed to conducting business with the highest ethical standards. We require all employees to comply with all applicable laws regulations rules and regulatory orders. Our reputation for honesty integrity and high ethics is as important to us as our reputation for making innovative sensing solutions.Teledyne is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race color religion sex sexual orientation gender identity national origin disability or veteran status age or any other characteristic or non-merit based factor made unlawful by federal state or local laws. Key Skills Acting,Electrical Controls,Actuarial,Attorney,Drafting,Adobe Photoshop Employment Type : Full-Time Experience: years Vacancy: 1 Monthly Salary Salary: 141900 - 189200